GIGA-BYTE TECHNOLOGY CO., LTD.

GA-486VM

Processor

80486SX/80487SX/80486DX/80486DX2

Processor Speed

20/25/33/50(internal)/50/66(internal)MHz

Chip Set

UMC

Max. Onboard DRAM

32MB

SRAM Cache

64/128/256KB

BIOS

AMI

Dimensions

254mm x 218mm

I/O Options

VESA local bus slots (3)

NPU Options

None

CONNECTIONS

Purpose

Location

Purpose

Location

External battery

J2

Speaker

J8

Turbo LED

J5

Power LED & keylock

J9

Reset switch

J6

32-bit VESA card (3)

S1 - S3

Turbo switch

J7

   

USER CONFIGURABLE SETTINGS

Function

Jumper

Position

»

CMOS memory normal operation

J3

pins 1 & 2 closed

 

CMOS memory clear

J3

pins 2 & 3 closed

»

Monitor type select color

J11

closed

 

Monitor type select monochrome

J11

open

»

VESA bus wait states select 0

JP5

open

 

VESA bus wait state select 1

JP5

open

CPU JUMPER CONFIGURATION

CPU Type

OSC

JP2

JP6

W5

W6

80486SX-20

20MHz

pins 1 & 2 closed

open

open

pins 2 & 3 closed

80486SX-20

40MHz

pins 1 & 2 closed

open

closed

pins 2 & 3 closed

80486SX-25

25MHz

pins 1 & 2 closed

open

open

pins 2 & 3 closed

80487SX-25

25MHz

pins 1 & 2 closed

open

open

pins 1 & 2 closed

80486DX-25

25MHz

pins 1 & 2 closed

open

open

pins 1 & 2 closed

80486DX-33

33.3MHz

pins 1 & 2 closed

open

open

pins 1 & 2 closed

80486DX-40

40MHz

pins 1 & 2 closed

open

open

pins 1 & 2 closed

80486DX-50

50MHz

pins 2 & 3 closed

closed

open

pins 1 & 2 closed

80486DX2-50

25MHz

pins 1 & 2 closed

open

open

pins 1 & 2 closed

80486DX2-66

33.3MHz

pins 1 & 2 closed

open

open

pins 1 & 2 closed

DRAM CONFIGURATION

Size

Bank 0

Bank 1

1MB

(4) 256K x 9

NONE

2MB

(4) 256K x 9

(4) 256K x 9

4MB

(4) 1M x 9

NONE

5MB

(4) 1M x 9

(4) 256K x 9

8MB

(4) 1M x 9

(4) 1M x 9

16MB

(4) 4M x 9

NONE

20MB

(4) 1M x 9

(4) 4M x 9

32MB

(4) 4M x 9

(4) 4M x 9

SRAM JUMPER CONFIGURATION

Size

W1

W2

W3

W4

64KB

open

open

pins 1 & 2 closed

pins 1 & 2 closed

128KB

closed

open

pins 2 & 3 closed

pins 2 & 3 closed

256KB

closed

closed

pins 1 & 2 closed

pins 2 & 3 closed

SRAM CONFIGURATION

Size

Cache SRAM

Location

TAG

64KB

(8) 8K x 8

Banks 0 & 1

(1) 8K x 8

128KB

(4) 32K x 8

Bank 0

(1) 8K x 8

256KB

(8) 32K x 8

Banks 0 & 1

(1) 32K x 8